FPGA / RTL Engineer

Málaga 11-01-2026

FPGA / RTL Engineer

Málaga 11-01-2026
Resumen

Localización

Area

Tipo de contrato

Indefinido

Fecha de publicación

11-01-2026

Descripción de la oferta

FPGA / RTL Engineer at Clue Technologies Apply for the FPGA / RTL Engineer role at Clue Technologies . 2 days ago – Be among the first 25 applicants. About Clue At Clue, we research, design, and manufacture new computing technologies to enable innovative intelligent systems. We focus on next‑generation avionics, offering a series of general‑purpose computers for aerospace systems based on modular and flexible architecture. We also develop machine‑learning applications built to run in our airborne hardware, and the development of Systems on Chips (SoC) and ASICs for safety‑critical applications is part of our roadmap. What is the job about? The RTL Engineer will be an integral part of a team that invents, builds, verifies, and maintains a myriad of IP cores for internal use, ranging from Avionics IP cores to state‑of‑the‑art custom application modules. You will engage in design decisions across disciplines and teams (hardware, firmware), analyze requirements and designs to detect areas of improvement or non‑compliance, and lead several FPGA development projects putting our IP to work on Clue’s computer boards. What profile are we looking for? Mandatory: Around 3 – 5 years of relevant experience. Must be based in Málaga or willing to relocate. Able to communicate in English and Spanish fluently. Expert using VHDL. Excellent ability to create modular and reusable architectures. Experience under design assurance standards (DO‑254 or similar). Knowledge of Ethernet. Valuable: Knowledge of video standards: DisplayPort, ARINC 818, SMPTE 232, etc. Knowledge of Ethernet, AFDX, TSN, TTE, etc. Knowledge of PCIe, AXI4, DMA, etc. RTL Verification experience (Directed test benches, formal verification, UVVM). Prefer scripting (Python, TCL) to automate tasks. Understanding of formal verification. Experience in ASIC design. Experience with synthesis tools (Synplify, Vivado, Quartus II). Strong Static Timing Analysis skills; able to spot and fix timing issues. What skills do we value? Role model for junior engineers, comfortable giving and receiving feedback. Proactive attitude and demonstrate autonomy. Strong analytical and problem‑solving skills. Keen on researching state‑of‑the‑art solutions and applying critical thinking. Excellent organizational skills. A strong desire to learn. Team‑oriented, humble, open‑mind to constructive feedback. Passion for quality and attention to detail; balancing optimization with on‑time delivery. Zero excuses, accountable for decisions and tasks. Excellent written and verbal communication skills. What do we offer? Hybrid work. Full‑time, permanent contract. Private medical insurance. 25 + 2 flexible vacation days. Schedule flexibility. Free Friday afternoons. Career development and training scheme. Free coffee and snacks. Healthy lunch served daily for staff (Monday–Thursday). Work with cutting‑edge technologies. Which are the steps of the process? Talent Interview Technical Interview Management Interview Need more information about these steps? Click here. Seniority level Mid‑Senior level Employment type Contract Job function Engineering and Information Technology Industries Aviation & Aerospace #J-18808-Ljbffr

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